Important Dates

Oct. 1, 2017 Sep. 11, 2017
Submission deadline

Oct. 20, 2017
Notification of Acceptance

Nov. 24, 2017
Final paper submission date


Tutorial 1

3D Video Capturing and Processing Techniques for AR/VR Contents Generation

Yo-Sung Ho
(Gwangju Institute of Science and Technology (GIST), Gwangju, Korea)
14:00-15:30, 25 Jan. 2018


With the emerging market of AR/VR imaging products, 3D video has become an active area of research and development in recent years. 3D video is the key to provide more realistic and immersive perceptual experiences than the existing 2D counterpart. There are many applications of 3D video, such as 3D movie and 3DTV, which are considered the main drive of the next-generation technical revolution. Stereoscopic display is the current mainstream technology for 3DTV, while auto-stereoscopic display is a more promising solution that requires more research endeavors to resolve the associated technical difficulties.
In this tutorial lecture, we are going to cover the current state-of-the-art technologies of 3D video capturing and processing for AR/VR applications. After defining the basic requirements for 3D realistic multimedia services, we will cover various multi-modal immersive media processing techniques. We also address the depth estimation problem for natural 3D scenes and discuss several challenging issues of 3D video capturing and processing, such as camera calibration, image rectification, illumination compensation and color correction. In addition, we are going to discuss some MPEG activities for 3D video coding, including depth map estimation, prediction structure for multi-view video coding, multi-view video-plus-depth coding, and intermediate view synthesis for immersive 3D video display applications.


Dr. Yo-Sung Ho, a new IEEE Fellow, received his B.S. and M.S. degrees in electronic engineering from Seoul National University, Seoul, Korea, in 1981 and 1983, respectively, and the Ph.D. degree in electrical and computer engineering from the University of California, Santa Barbara, in 1990. He joined ETRI (Electronics and Telecommunications Research Institute), Daejon, Korea, in 1983. From 1990 to 1993, he was with North America Philips Laboratories, Briarcliff Manor, New York, where he was involved in development of the Advanced Digital High-Definition Television (AD-HDTV) system. In 1993, he rejoined the technical staff of ETRI and was involved in development of the Korean DBS Digital Television and High-Definition Television systems. Since 1995, he has been with Gwangju Institute of Science and Technology (GIST), where he is currently Professor of Information and Communications Department. Since August 2003, he has been Director of Realistic Broadcasting Research Center at GIST in Korea. He has served as an Associate Editor of IEEE Transactions on Multimedia (T-MM) and IEEE Transactions on Circuits and Systems Video Technology (T-CSVT). His research interests include Digital Image and Video Coding, Image Analysis and Image Restoration, Three-dimensional Image Modeling and Representation, Advanced Source Coding Techniques, Augmented Reality (AR) and Virtual Reality (VR), Three-dimensional Television (3DTV) and Realistic Broadcasting Technologies.

Tutorial 2

Signal Processing and Machine Learning for Brain-Machine Interfacing

Toshihisa Tanaka
(Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology (TUAT), Japan)
14:00-15:30, 25 Jan. 2018


This tutorial addresses a historical background and recent progress of electroencephalogram (EEG)-based brain-machine interfaces (BMI). This interdisciplinary area is related to the cutting edges of neuroscience, signal processing, and machine learning. In this tutorial, particularly, I would like to talk about the importance of neural modulation and demodulation of EEG signals. Several types of modulation induced by external stimuli and/or mental tasks will be explained with neuroscientific findings. The modulated signals are measured as brain responses such as event-related potentials (ERP), steady-state evoked potentials (SSEP), and event-related synchronization/desynchronization (ERS/ERD), which are then demodulated to estimate the original stimuli or tasks. This is called demodulation or decoding, which needs efficient signal processing and machine learning algorithms. I will emphasize the aspect of signal processing and machine learning in the application to BMI. I will exhibit some interesting demonstrations of recently developed BMIs for better understanding.


Toshihisa Tanaka received the B.E., the M.E., and the Ph.D. degrees from the Tokyo Institute of Technology in 1997, 2000, and 2002, respectively. From 2000 to 2002, he was a JSPS Research Fellow. From October 2002 to March 2004, he was a Research Scientist at RIKEN Brain Science Institute. In April 2004, he joined Department of Electrical and Electronic Engineering, the Tokyo University of Agriculture and Technology, where he is currently an Associate Professor. In 2005, he was a Royal Society visiting fellow at the Communications and Signal Processing Group, Imperial College London, U.K. From June 2011 to October 2011, he was a visiting faculty member in Department of Electrical Engineering, the University of Hawaii at Manoa.
His research interests include a broad area of signal processing and machine learning including brain and biomedical signal processing, brain-machine interfaces and adaptive systems. He is a co-editor of Signal Processing Techniques for Knowledge Extraction and Information Fusion (with Mandic, Springer), 2008.
He served as an associate editor and a guest editor of special issues in journals including Neurocomputing and IEICE Transactions on Fundamentals. Currently he serves as an associate editor of IEEE Transactions on Neural Networks and Learning Systems, Computational Intelligence and Neuroscience (Hindawi), and Advances in Data Science and Adaptive Analysis (World Scientific). Furthermore, he serves as a member-at-large, board of governors (BoG) of Asia-Pacific Signal and Information Processing Association (APSIPA). He was a chair of the Technical Committee on Biomedical Signal Processing, APSIPA. He is a senior member of IEEE, and a member of IEICE, APSIPA, and Society for Neuroscience.

Tutorial 3

Ultra-low Power/Energy SRAM Design for Internet-of-Things

Tony Tae-Hyoung Kim
(Nanyang Technological University (NTU), Singapore)
14:00-15:30, 26 Jan. 2018


Recently, various ultra-low power applications such as Internet-of-Things (IoT), wearable devices, and biomedical devices have emerged opening up a new domain of integrated circuits design. In these applications, ultra-low voltage circuit techniques for improving the power and energy efficiencies have been the main research focus. One of the most challenging functional blocks in ultra-low power systems is memory where SRAMs are dominantly employed. Since SRAMs occupy majority of the power in those systems, design of ultra-low power SRAMs is a critical task for power and energy efficiencies. One of the most popular SRAM design methodology for ultra-low power applications is using aggressively scaled supply voltage. However, this deteriorates various SRAM design parameters such as stability, sensing margin, write margin, etc. Various techniques for ultra-low voltage SRAMs have been reported to tackle the limitations at ultra-low voltage operation. This tutorial will provide the basics in ultra-low voltage SRAMs followed by the trend in various state-of-the-art ultra-low voltage SRAMs. More detailed ultra-low voltage SRAM design works developed by the author's group will also be explained. Finally, we will discuss future directions in ultra-low voltage SRAMs including various emerging non-volatile memory devices such as STTRAM, RRAM, etc.


Tony Tae-Hyoung Kim (M' 06-SM'14) received the B.S. and M.S. degrees in electrical engineering from Korea University, Seoul, Korea, in 1999 and 2001, respectively. He received the Ph.D. degree in electrical and computer engineering from University of Minnesota, Minneapolis, MN, USA in 2009. From 2001 to 2005, he worked for Samsung Electronics where he performed research on the design of high-speed SRAM memories, clock generators, and IO interface circuits. In 2007 ~ 2009 summer, he was with IBM T. J. Watson Research Center and Broadcom Corporation where he performed research on circuit reliability, low power SRAM, and battery backed memory design, respectively. On November 2009, he joined Nanyang Technological University where he is currently an associate professor.
He received "Best Demo Award" ay APCCAS2016, "Low Power Design Contest Award" at ISLPED2016, best paper awards at 2014 and 2011 ISOCC, "AMD/CICC Student Scholarship Award" at IEEE CICC2008, Departmental Research Fellowship from Univ. of Minnesota in 2008, "DAC/ISSCC Student Design Contest Award" in 2008, "Samsung Humantec Thesis Award" in 2008, 2001, and 1999, and "ETRI Journal Paper of the Year Award" in 2005. He is an author/co-author of +110 journal and conference papers and has 17 US and Korean patents registered. His current research interests include low power and high performance digital, mixed-mode, and memory circuit design, ultra-low voltage circuits and systems design, variation and aging tolerant circuits and systems, and circuit techniques for 3D ICs. He serves as an Associate Editor of IEEE Transactions on VLSI Systems. He is an IEEE senior member and the Chair of IEEE Solid-State Circuits Society Singapore Chapter. He has served numerous conferences as a committee member.

Tutorial 4

Variational Optimization for Image Processing and Understanding

Changick Kim
(School of Electrical Engineering, KAIST, Daejeon, Korea)
14:00-15:30, 26 Jan. 2018


Variational approaches are among the most classical and established methods to solve a multitude of problems arising in computer vision and image processing. Over the past decades, powerful methods have been evolved in various image processing and vision areas, such as image denoising, optical flow estimation, image segmentation and 3D reconstruction, both in terms of optimization efficiency and in terms of better formulation. In this tutorial, I will introduce the basic concepts of variational optimization, which can be well formulated for solving various ill-posed problems. Especially we will focus on image denoising, which is in the simplest form and thus easily understood. After I show how the problem can be formulated as variational problems, its variants will be introduced. Subsequently, I will also focus on recent optimization techniques to efficiently minimize energy functionals formulated in the variational methods.


Changick Kim received the B.S. degree in electrical engineering from Yonsei University, Seoul, South Korea, in 1989, the M.S. degree in electronics and electrical engineering from the Pohang University of Science and Technology (POSTECH), Pohang, South Korea, in 1991, and the Ph.D. degree in electrical engineering from the University of Washington, Seattle, WA, USA, in 2000. From 2000 to 2005, he was a Senior Member of Technical Staff with Epson Research and Development, Inc., Palo Alto, CA, USA. From 2005 to 2009, he was an Associate Professor with the School of Engineering, Information and Communications University, Daejeon, South Korea. Since March 2009, he has been with the Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, where he is currently a Professor. His research interests include multimedia signal processing, image/video understanding, and 3D reconstruction. He serves as an Associate Editor of the journal of Signal Processing Systems, Springer. He has served on numerous conference committees, e.g., as area chair of ICME 2016, 2017, organizing committee member of VCIP 2018, ICASSP 2018, and so on.